The present invention relates to a method of manufacturing a semiconductor integrated circuit device. More particularly, the invention relates to technology that can be effectively applied to a semiconductor integrated circuit device containing two kinds of MISFETs (metal insulator semiconductor field-effect transistors) to which different voltages are applied.
In a memory LSI, such as, CMOS (complementary metal oxide semiconductor) logic LSI (large scale integrated circuit) and a SRAM (static random access memory) or DRAM (dynamic random access memory), as well as in a CMOS logic LSI mounting a memory circuit, the power source voltages may not often be the same between the internal circuit and the input/output circuit. In the CMOS logic LSI, for example, the length (gate length) of the gate electrodes of MISFETs in the internal circuit is set to be shorter than the gate length of MISFETs in the input/output circuit in order to increase the speed. In order to maintain a breakdown voltage of the semiconductor regions constituting the sources and drains of MISFETs in the internal circuit, however, the power-source voltage for the internal circuit is set to be lower than the power-source voltage for the input/output circuit. Here, in order to maintain the reliability of the gate-insulating films of MISFETs in the input/output circuit having a high power-source voltage, the thickness of the gate-insulating films is selected to be larger than the thickness of the gate-insulating films of MISFETs in the internal circuit having a low power-source voltage.
Two kinds of gate-insulating films having different thicknesses are formed on a semiconductor substrate made of silicon by, first, forming element isolation regions on the main surface of the semiconductor substrate and, then, subjecting the semiconductor substrate to heat oxidation treatment a first time to form a silicon oxide film on the surface of the semiconductor substrate. Next, active regions where the thick gate-insulating film will be formed are covered with a photoresist film, the silicon oxide film on the active regions where the thin gate-insulating film will be formed is removed by wet etching and, then, the photoresist film is removed, followed by heat-oxidizing the semiconductor substrate a second time. That is, the thin gate-insulating film is formed through heat oxidation a second time, and the thick gate-insulating film is formed through the heat oxidation the first time and through the heat oxidation the second time.
Through their study, however, the present inventors have discovered the fact that, according to the above-mentioned method of forming two kinds of gate-insulating films of different thicknesses, the active regions where the thick gate-insulating film is to be formed is covered with the photoresist film at the time of removing, by wet etching, the silicon oxide film from the active regions where the thin gate-insulating film is to be formed. Therefore, the thin gate-insulating film, thick gate-insulating film or these two gate-insulating films lose breakdown voltage due to contamination caused by the photoresist film and due to any damage which occurs in the step of removing the photoresist film and in the subsequent step of washing.
The object of the present invention is to provide technology capable of improving the reliability of a the semiconductor integrated circuit device containing a plurality of kinds of MISFETs having gate-insulating films of different thicknesses.
The above and other objects as well as novel features of the invention will become obvious from the description of provided in the specification and the accompanying drawings.
Briefly described below are representative examples of the invention disclosed in this application.
That is, the invention is concerned with a process for forming two kinds of gate-insulating films, wherein a first insulating film is formed by etching, using a photoresist film as a mask, on a region of a semiconductor substrate where an insulating film of a first relatively large thickness is to be formed and, then, a second insulating film is formed on the first insulating film in order to prevent the first insulating film from being scraped off in the step of washing which precedes the processing for forming an insulating film of a second relatively small thickness.
Further, the invention is concerned with a process for forming two kinds of gate-insulating films, wherein a first insulating film is formed by etching, using a photoresist film as a mask, on a region of a semiconductor substrate where an insulating film of a first relatively large thickness is to be formed and, then, a second insulating film that has been formed in advance on the first insulating film is used as an etching stopper in the step of washing which precedes the processing for forming an insulating film of a second relatively small thickness.
Other representative examples of the invention disclosed in the application are as described below briefly.
1. A method of manufacturing a semiconductor integrated circuit device by forming an insulating film of a first thickness on a first active region of a semiconductor substrate and forming an insulating film of a second thickness smaller than said first thickness on a second active region, said method comprising the steps of:
(a) forming a first insulating film on the surface of said semiconductor substrate;
(b) forming a second insulating film which is a protection film on said first insulating film;
(c) covering said first active region with a masking pattern;
(d) successively removing said second insulating film and said first insulating film from said second active region by using said masking pattern as a mask;
(e) selectively removing chiefly said second insulating film from said first active region after said masking pattern has been removed; and
(f) forming a third insulating film on said semiconductor substrate.
2. A method of manufacturing a semiconductor integrated circuit device by forming an insulating film of a first thickness on a first active region of a semiconductor substrate and forming an insulating film of a second thickness smaller than said first thickness on a second active region, said method comprising the steps of:
(a) forming a first insulating film on the surface of said semiconductor substrate;
(b) forming a second insulating film which is a protection film on said first insulating film after the surface of said first insulating film has been removed by not more than about 1 nm;
(c) covering said first active region with a masking pattern;
(d) successively removing said second insulating film and said first insulating film from said second active region by using said masking pattern as a mask;
(e) selectively removing said second insulating film from said first active region after said masking pattern has been removed; and
(f) forming a third insulating film on said semiconductor substrate.
3. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
(a) forming a first insulating film on the surface of a semiconductor substrate;
(b) forming a second insulating film which is a protection film on said first insulating film;
(c) forming a masking pattern on said semiconductor substrate so as to cover a first region where an insulating film having a relatively large thickness will be formed but not covering a second region where an insulating film having a relatively small thickness will be formed other than said first region;
(d) successively removing said second insulating film and said first insulating film from said second active region by using said masking pattern as a mask;
(e) after said masking pattern has been removed, removing said second insulating film by washing said semiconductor substrate, said second insulating film being used for suppressing said first insulating film from being scraped off; and
(f) forming a third insulating film on said semiconductor substrate in order to form an insulating film of a first relatively large thickness on said first region and to form an insulating film of a second relatively small thickness on said second region.
4. A method of manufacturing a semiconductor integrated circuit device according to 1, 2 or 3 above, wherein the heat-nitriding is effected after (a) the step of forming the first insulating film or after (f) the step of forming the third insulating film.
5. A method of manufacturing a semiconductor integrated circuit device according to 1, 2 or 3 above, wherein the plasma-nitriding or the radical-nitriding is effected after (a) the step of forming the first insulating film or after (f) the step of forming the third insulating film.
6. A method of manufacturing a semiconductor integrated circuit device according to 4 or 5 above, further comprising a step of forming a polycrystalline silicon film containing boron on said third insulating film.
7. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 6 above, wherein after chiefly said second insulating film only has been removed in said step (d), impurities for controlling the threshold voltage are injected through said first insulating film.
8. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 7 above, wherein the rate of etching said second insulating film is larger than the rate of etching said first insulating film in said step (e).
9. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 8 above, wherein the amount of reduction of the thickness of said first insulating film in said step (e) is not more than 1 nm.
10. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
(a) forming a first insulating film on the surface of a semiconductor substrate having a first active region and a second active region;
(b) forming a second insulating film which is a protection film on said first insulating film;
(c) successively removing said second insulating film and said first insulating film from said second active region;
(d) washing said semiconductor substrate after said step (c);
(e) forming a third insulating film on said semiconductor substrate after said step (d) to form an insulating film of a first relatively large thickness on said first active region and to form an insulating film of a second relatively small thickness on said second activate region;
wherein in effecting the washing in said step (d), the rate for etching said second insulating film is larger than the rate for etching said first insulating film, and said second insulating film is removed from said second active region.
11. A method of manufacturing a semiconductor integrated circuit device according to 10 above, wherein the amount of reduction of the thickness of said first insulating film in said step (d) is not more than 1 nm.
12. A method of manufacturing a semiconductor integrated circuit device according to 9 or 11 above, wherein the amount of reduction of the thickness of said first insulating film in said step (d) is from 0.2 to 0.4 nm.
13. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 12 above, wherein said second insulating film is formed by the chemical vapor-phase deposition method.
14. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 13 above, wherein said first insulating film is formed by the heat oxidation method, and said second insulating film is formed by the chemical vapor-phase deposition method.
15. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 14 above, wherein said first insulating film and said second insulating film are silicon oxide films.
16. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
(a) forming a first insulating film on the surface of a semiconductor substrate;
(b) forming a second insulating film which is a protection film on said first insulating film;
(c) forming a masking pattern on said semiconductor substrate so as to cover a first region where an insulating film having a relatively large thickness will be formed but not covering a second region where an insulating film having a relatively small thickness will be formed other than said first region;
(d) successively removing said second insulating film and said first insulating film from said second active region by using said masking pattern as a mask;
(e) after said masking pattern has been removed, washing said semiconductor substrate using said second insulating film as a stopper; and
(f) forming a third insulating film on said semiconductor substrate in order to form an insulating film of a first relatively large thickness on said first region and to form an insulating film of a second relatively small thickness on said second region.
17. A method of manufacturing a semiconductor integrated circuit device according to 16 above, wherein the rate of etching said second insulating film is smaller than the rate of etching said first insulating film in said step (e).
18. A method of manufacturing a semiconductor integrated circuit device according to 16 or 17 above, wherein said second insulating film has anti-oxidizing property.
19. A method of manufacturing a semiconductor integrated circuit device according to 16, 17 or 18 above, wherein after said first insulating film has been formed, said second insulating film is formed on said semiconductor substrate by the chemical vapor-phase deposition method.
20. A method of manufacturing a semiconductor integrated circuit device according to 16, 17 or 18 above, wherein after said first insulating film has been formed, said second insulating film is formed on said semiconductor substrate by the heat-nitriding.
21. A method of manufacturing a semiconductor integrated circuit device according to 16, 17 or 18 above, wherein after said first insulating film has been formed, said second insulating film is formed on said semiconductor substrate by the plasma-nitriding or the radical-nitriding.
22. A method of manufacturing a semiconductor integrated circuit device according to any one of 16 to 21 above, wherein said second insulating film comprises silicon nitride.
23. A method of manufacturing a semiconductor integrated circuit device according to any one of 20 to 22 above, further comprising a step of forming a polycrystalline silicon film containing boron on said third insulating film.
24. A method of manufacturing a semiconductor integrated circuit device according to any one of 16 to 23 above, wherein said semiconductor substrate is heat-oxidized in said step (f) in a state where said first region is suppressed by said second insulating film from being oxidized, thereby to form said third insulating film on the semiconductor substrate of said second region.
25. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 21 above, wherein said third insulating film is formed on the semiconductor substrate by the chemical vapor-phase deposition method in said step (f).
26. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 25 above, wherein said third insulating film is composed of a material having a dielectric constant larger than that of said first insulating film.
27. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 26 above, wherein at least a portion of said third insulating film comprises tantalum oxide, titanium oxide or silicon nitride.
28. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 13 or 16 to 24 above, wherein said first insulating film is formed by the chemical vapor-phase deposition method.
29. A method of manufacturing a semiconductor integrated circuit device according to any one of 16 to 24 or 28 above, wherein said first insulating film comprises silicon oxide.
30. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 29 above, wherein the insulating film having said first thickness and the insulating film having said second thickness are the gate-insulating films of the MIS transistors.
31. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 30 above, further comprising the steps of:
(a) depositing an electrically conducting film for forming the gate electrode on the semiconductor substrate after the insulating film of said first thickness and the insulating film of said second thickness have been formed;
(b) forming the gate electrodes by patterning the electrically conducting film for forming said gate electrodes; and
(c) introducing impurities into said semiconductor substrate to form a pair of semiconductor regions for forming source and drain.
32. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 31 above, further comprising the steps of:
(a) depositing an electrically conducting film for forming the gate electrode on the semiconductor substrate after the insulating film of said first thickness and the insulating film of said second thickness have been formed;
(b) forming a masking film on the electrically conducting film for forming said gate electrodes permitting the first element region to be exposed but covering the second element region, and introducing first type of impurities into the electrically conducting film for forming said gate electrodes using said masking film as a mask;
(c) forming a masking film on the electrically conducting film for forming said gate electrodes permitting said second element region to be exposed but covering said first element region, and introducing second type of impurities having a type of electric conduction different from said first type of impurities into the electrically conducting film for forming said gate electrodes using said masking film as a mask; and
(d) forming the gate electrodes of a first type of electric conduction containing said first type of impurities by patterning the electrically conducting film for forming said gate electrodes, and forming the gate electrodes of a second type of electric conduction containing said second type of impurities.
33. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 32 above, further comprising the steps of:
(a) depositing an electrically conducting film for forming the gate electrode on the semiconductor substrate after the insulating film of said first thickness and the insulating film of said second thickness have been formed;
(b) forming a masking film on the electrically conducting film for forming said gate electrodes permitting the first element region to be exposed but covering the second element region, and introducing first type of impurities into the electrically conducting film for forming said gate electrodes using said masking film as a mask;
(c) forming a masking film on the electrically conducting film for forming said gate electrodes permitting said second element region to be exposed but covering said first element region, and introducing second type of impurities having a type of electric conduction different from said first type of impurities into the electrically conducting film for forming said gate electrodes using said masking film as a mask;
(d) depositing a third electrically conducting film for forming gate electrodes on the electrically conducting film for forming said gate electrodes via the second electrically conducting film for forming the gate electrodes; and
(e) patterning said first, second and third electrically conducting films for forming said gate electrodes in order to form the gate electrodes of a first type of electric conduction using said first electrically conducting film containing said first type of impurities and to form the gate electrodes of a second type of electric conduction using said first electrically conducting film containing said second type of impurities.
34. A method of manufacturing a semiconductor integrated circuit device according to 33 above, wherein said first electrically conducting film is polycrystalline silicon, said second electrically conducting film is tungsten nitride or titanium nitride, and said third electrically conducting film is tungsten.
35. A method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 32 above, further comprising the steps of:
(a) depositing an electrically conducting film for forming the gate electrode on the semiconductor substrate after the insulating film of said first thickness and the insulating film of said second thickness have been formed;
(b) patterning the electrically conducting film for forming said gate electrodes to form the gate electrodes;
(c) introducing impurities into said semiconductor substrate to form a pair of semiconductor regions for forming source and drain;
(d) forming side wall-insulating films on the side surfaces of said gate electrodes;
(e) depositing an electrically conducting film for forming silicide on said semiconductor substrate in a state where the upper surfaces of said gate electrodes and part or whole of the pair of semiconductor regions are exposed; and
(f) heat-treating said semiconductor substrate to form a silicide layer in a contact portion between the electrically conducting film for forming said silicide and the gate electrodes or the pair of semiconductor regions.
In forming a plurality of kinds of gate insulating films having different thicknesses according to the above-mentioned means, the photoresist pattern is not directly formed on the first insulating film that constitutes a relatively thick gate-insulating film but, instead, the photoresist pattern is formed via the second insulating film or via a reformed layer of the first insulating film. Therefore, contaminants from the photoresist film adhere on the second insulating film or on the reformed layer of the first insulating film. As the first insulating film, there is used a film formed by heat-treating the semiconductor substrate, a film formed by the chemical vapor-phase deposition method, or a film formed by nitriding the film that has been formed by the chemical vapor-phase deposition method. As the second insulating film, there is used a film formed by, for example, the chemical vapor-phase deposition method which is different from the method of forming the first insulating film. This enables the second insulating film in the washing solution to be etched at a rate larger than the rate of etching the first insulating film. By selectively removing the second insulating film by utilizing the difference in the etching rate, therefore, the first insulating film is not affected by the contamination caused by the resist and, besides, damage to the first insulating film can be avoided in the step of removing the resist and in the subsequent washing step. By removing the surface portion of the first insulating film within such a degree that no defect develops in the film, further, it is possible to remove contaminants which have adhered on the interface between the first insulating film and the second insulating film, contributing to further improving the reliability of the gate-insulating film.
According to the above means, further, in effecting the washing prior to forming the insulating film of the relatively small second thickness, the second insulating film prevents the first insulating film from being scraped off on the region on where the insulating film of the relatively large first thickness is formed, so that weak spots in the first insulating film will not be exposed and fine pores will not be formed. Therefore, the gate-insulating film having the relatively large first thickness is suppressed or prevented from losing its breakdown voltage, and the quality of the gate-insulating film can be improved.
According to the above means, further, in effecting the washing prior to forming the insulating film of the relatively small second thickness, the second insulating film, which is formed in advance on the first insulating film on the region on where the insulating film of the relatively large first thickness has been formed, works as an etching stopper so that the first insulating film is not scraped off, weak spots in the first insulating film will not be exposed and fine pores will not be formed. Therefore, the gate-insulating film having the relatively large first thickness is prevented from losing the breakdown voltage that tends to occur when the first insulating film is scraped off during the washing, whereby improved quality of the gate-insulating film can be maintained.